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Researchers Utilize NVIDIA Omniverse Platform to Analyze and Improve 3D Stacked Chip Designs

kyojuro 2024年7月1日星期一

One of the emerging trends in chip design and manufacturing is the adoption of advanced 3D stacking techniques, which significantly enhance chip density beyond the capabilities of traditional methods. In a recent official blog post, Baskar Rajagopalan of NVIDIA discussed how Ansys, a company specializing in engineering simulation and 3D design software, leverages the NVIDIA Omniverse platform to analyze 3D semiconductor designs and predict power consumption profiles.

This technology provides substantial benefits for chip designers, enabling them to view 3D chip designs comprehensively. It offers engineers a clearer understanding of how the chip will perform under varying conditions. NVIDIA illustrated how this approach facilitates faster and easier identification and correction of hotspots and electromagnetic (EM) issues.

Identifying hotspots is a crucial aspect of 3D chip design, as these hotspots typically occur between stacked silicon wafers. Utilizing a 3D view to examine a 3D chip design allows engineers to pinpoint the precise depth of a hotspot. In contrast, detecting hotspots in a 2D view is challenging, as the location might appear at the top, center, or bottom of the chip. Additionally, the ability to simulate the entire chip's temperature using the NVIDIA Omniverse platform aids in hotspot detection through various power curves and floorplans, enabling engineers to address thermal issues in a new 3D chip design before creating the first prototype.

Ansys recently demonstrated its 3D design software at the Design Automation Conference. The company has collaborated with NVIDIA's Fourier Neural Operator (FNO) modeling architecture to develop AI-generated tools for testing 3D stacked chip designs. Ansys researchers have created an AI agent model capable of predicting the temperature of any given chip based on heat transfer coefficients, thickness, material properties, and other system parameters defined by the temperature profile for a specific power profile.

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